The present invention is directed to a semiconductor device including an integrated circuit (IC) or a large scale integrated circuit (LSI). In particular, the present invention is directed to a semiconductor device (hereinafter referred to as a semiconductor chip or a chip) having means for regulating an external power supply voltage applied thereto so as to compensate chip-to-chip dispersion of electrical characteristics of the chip, such as power supply current.
As the packing densities of ICs increases, especially metal oxide semiconductor (MOS) ICs, the dimensional structure of the semiconductor chip becomes very fine, as discussed in Electronics, Aug. 18, 1977, pages 94-99, by Richard Pashley et al., causing various problems during production. Thus, accuracy and preciseness of the relevant production technology of transistors is required.
For example, MOS field effect transistors (FETs) have had their channel length shortened to 2 .mu.m. A MOSFET having a polysilicon gate electrode has a channel length defined by the width of the gate electrode since a self-aligned dopant ion implantation method forms source-drain regions of the associated MOSFET using the gate electrode as a mask. The accuracy of the dimensions of the gate electrode is adversely affected by an inadequate production process. That is, over-etching of the photoresist film (mask) for patterning the polysilicon gate electrode, incorrect lithography patterning of the photoresist film due to uneven substrate surfaces, over-etching of the polysilicon layer for forming the gate electrode, etc., adversely affect the device. Such fabrication processes are performed on every semiconductor wafer on which a number of semiconductor chips are built. The dimensions of the FETs, therefore, vary from wafer-to-wafer, that is, from chip-to-chip, in an integrated electronic circuit. For example, chip-to-chip dispersion of the channel length is approximately .+-.0.2 .mu.m in MOSFETs presently produced. This causes approximately 10% dispersion of the electrical characteristics, such as conductance (gm), threshold voltage (V.sub.th), and source-drain breakdown voltage, between devices. In contrast, the dispersion between individual FETs contained in one semiconductor chip is fairly small.
Generally, semiconductor chips or IC chips are mounted on a base and power is commonly supplied to individual chips from an external power source. As a result, problems due to variations in the electrical characteristics of each FET may arise, and problems such as too high a power supply current for chips containing high conductance FETs (i.e., FETs having a short channel length), and too low a power supply current and a low switching speed for chips containing low conductance FETs (i.e., FETs having a long channel length and a high gate-source capacitance) may occur. This results in degradation of the efficiency and stability of the circuit.
The above-described chip-to-chip variations in the electrical characteristics of FETs mounted on every chip is, at present, inevitable to some degree. It is rather difficult and costly to upgrade the accuracy and stability of the fabrication process of semiconductor chips. Thus, a solution is needed to overcome this problem.